74ACT16823 具有三态输出的 18 位总线接口触发器

These 18-bit flip-flops feature 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, parity bus interfacing, and working registers.

The 'ACT16823 can be used as two 9-bit flip-flops or one 18-bit flip-flop. With the clock-enable () input low, the D-type flip-flops enter data on the low-to-high transitions of the clock. Taking high disables the clock buffer, thus latching the outputs. Taking the clear () input low causes the Q outputs to go low independently of the clock.

A buffered output-enable () input can be used to place the outputs in either a normal logic state (high or low logic levels) or a high-impedance state

74ACT16823
Voltage Nodes(V) 5  
Vcc range(V) 4.5 to 5.5  
Input Level TTL  
Output Level CMOS  
Output Drive(mA) -24/24  
No. of Outputs 18  
Static Current 0.08  
th(ns) 0.5  
tpd max(ns) 12.9  
tsu(ns) 7  
Logic True  
Technology Family ACT  
Rating Catalog
74ACT16823 特性
74ACT16823 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
74ACT16823DL ACTIVE -40 to 85 1.55 | 1ku SSOP (DL) | 56 25 | TUBE  
74ACT16823DLG4 ACTIVE -40 to 85 1.55 | 1ku SSOP (DL) | 56 25 | TUBE  
74ACT16823DLR ACTIVE -40 to 85 1.30 | 1ku SSOP (DL) | 56 1000 | LARGE T&R  
74ACT16823DLRG4 ACTIVE -40 to 85 1.30 | 1ku SSOP (DL) | 56 1000 | LARGE T&R  
74ACT16823 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
74ACT16823DL Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT16823DL 74ACT16823DL
74ACT16823DLG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT16823DLG4 74ACT16823DLG4
74ACT16823DLR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT16823DLR 74ACT16823DLR
74ACT16823DLRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT16823DLRG4 74ACT16823DLRG4
74ACT16823 应用技术支持与电子电路设计开发资源下载
  1. 74ACT16823 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)