CD74HCT670 高速 CMOS 逻辑 4 x 4 寄存器文件

The ’HCT670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE\) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE\) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE\) is low.

CD74HCT670
Rating Military  
Technology Family HCT
CD74HCT670 特性
CD74HCT670 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
CD74HCT670E ACTIVE -55 to 125 0.46 | 1ku PDIP (N) | 16 25 | TUBE CD74HCT670E
CD74HCT670EE4 ACTIVE -55 to 125 0.46 | 1ku PDIP (N) | 16 25 | TUBE CD74HCT670E
CD74HCT670M ACTIVE -55 to 125 0.50 | 1ku SOIC (D) | 16 40 | TUBE HCT670M
CD74HCT670ME4 ACTIVE -55 to 125 0.50 | 1ku SOIC (D) | 16 40 | TUBE HCT670M
CD74HCT670MG4 ACTIVE -55 to 125 0.50 | 1ku SOIC (D) | 16 40 | TUBE HCT670M
CD74HCT670 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
CD74HCT670E Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type CD74HCT670E CD74HCT670E
CD74HCT670EE4 Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type CD74HCT670EE4 CD74HCT670EE4
CD74HCT670M Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74HCT670M CD74HCT670M
CD74HCT670ME4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74HCT670ME4 CD74HCT670ME4
CD74HCT670MG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM CD74HCT670MG4 CD74HCT670MG4
CD74HCT670 应用技术支持与电子电路设计开发资源下载
  1. CD74HCT670 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)