SN74ABTH18652A 具有 18 位通用总线收发器的扫描测试设备

The 'ABTH18652A and 'ABTH182652A scan test devices with 18-bit bus transceivers and registers are members of the Texas Instruments SCOPETM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are 18-bit bus transceivers and registers that allow for multiplexed transmission of data directly from the input bus or from the internal registers. They can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells

SN74ABTH18652A
Voltage Nodes(V) 5  
Vcc range(V) 4.5 to 5.5  
Input Level TTL  
Logic True  
No. of Outputs 18  
Output Drive(mA) -32/64  
tpd max(ns) 5.4  
Output Level TTL  
Static Current 13.1  
Rating Catalog  
Technology Family ABT
SN74ABTH18652A 特性
SN74ABTH18652A 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74ABTH18652APMG4 ACTIVE -40 to 85 16.70 | 1ku LQFP (PM) | 64 160 | JEDEC TRAY (10+1)  
SN74ABTH18652APM ACTIVE -40 to 85 16.70 | 1ku LQFP (PM) | 64 160 | JEDEC TRAY (10+1)  
SN74ABTH18652A 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74ABTH18652APMG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-3-260C-168 HR SN74ABTH18652APMG4 SN74ABTH18652APMG4
SN74ABTH18652APM Green (RoHS & no Sb/Br)  CU NIPDAU  Level-3-260C-168 HR SN74ABTH18652APM SN74ABTH18652APM
SN74ABTH18652A 应用技术支持与电子电路设计开发资源下载
  1. SN74ABTH18652A 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器特殊逻辑产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)