SN74AUP2G02 低功耗双路反向器闸

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see ). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 1).

The SN74AUP2G02 performs the Boolean function Y = A in positive logic.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down

SN74AUP2G02
Pin/Package 6DSBGA, 6SC70, 6SON  
Operating Temperature Range(°C) -40 to 85  
IOL(mA) 4  
IOH(mA) -4  
Vcc max(V) 3.6  
Technology Family AUP  
Vcc min(V) 0.8  
Approx. Price (US$) 0.22 | 1ku  
No. of Gates 2  
tpd max(ns) 4.3  
ICC(uA) 0.9  
Rating Catalog
SN74AUP2G02 特性
SN74AUP2G02 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74AUP2G02DCKR ACTIVE -40 to 85 0.22 | 1ku SC70 (DCK) | 6 3000 | LARGE T&R  
SN74AUP2G02DRYR ACTIVE -40 to 85 0.25 | 1ku SON (DRY) | 6 5000 | LARGE T&R  
SN74AUP2G02DSFR ACTIVE -40 to 85 0.24 | 1ku SON (DSF) | 6 5000 | LARGE T&R  
SN74AUP2G02YFPR ACTIVE -40 to 85 0.33 | 1ku DSBGA (YFF) | 6 3000 | LARGE T&R  
SN74AUP2G02 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74AUP2G02DCKR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP2G02DCKR SN74AUP2G02DCKR
SN74AUP2G02DRYR Green (RoHS & no Sb/Br)  NIPDAU  Level-1-260C-UNLIM SN74AUP2G02DRYR SN74AUP2G02DRYR
SN74AUP2G02DSFR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74AUP2G02DSFR SN74AUP2G02DSFR
SN74AUP2G02YFPR Green (RoHS & no Sb/Br)  SNAGCU  Level-1-260C-UNLIM SN74AUP2G02YFPR SN74AUP2G02YFPR
SN74AUP2G02 应用技术支持与电子电路设计开发资源下载
  1. TI 德州仪器小尺寸逻辑器件产品选型与价格 . xls
  2. Logic Guide 2009 (PDF 4263 KB)
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)