SN74HC563 具有三态输出的八路透明 D 类锁存器

These 8-bit transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

While the latch-enable (LE) input is high, the Q\ outputs follow the complements of the data (D) inputs. When LE is taken low, the outputs are latched at the inverses of the levels set up at the D inputs.

A buffered output-enable (OE)\ input places the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly

SN74HC563
Voltage Nodes(V) 6, 5, 2  
Rating Catalog
SN74HC563 特性
SN74HC563 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74HC563DW ACTIVE 0 to 70 3.20 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74HC563DWE4 ACTIVE 0 to 70 3.20 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74HC563DWG4 ACTIVE 0 to 70 3.20 | 1ku SOIC (DW) | 20 25 | TUBE  
SN74HC563DWR ACTIVE 0 to 70 2.65 | 1ku SOIC (DW) | 20 2000 | LARGE T&R  
SN74HC563DWRE4 ACTIVE 0 to 70 2.65 | 1ku SOIC (DW) | 20 2000 | LARGE T&R  
SN74HC563DWRG4 ACTIVE 0 to 70 2.65 | 1ku SOIC (DW) | 20 2000 | LARGE T&R  
SN74HC563N ACTIVE 0 to 70 2.90 | 1ku PDIP (N) | 20 20 | TUBE  
SN74HC563N3 OBSOLETE 0 to 70   PDIP (N) | 20    
SN74HC563NE4 ACTIVE 0 to 70 2.90 | 1ku PDIP (N) | 20 20 | TUBE  
SN74HC563NSR ACTIVE 0 to 70 2.90 | 1ku SO (NS) | 20 2000 | LARGE T&R  
SN74HC563NSRE4 ACTIVE 0 to 70 2.90 | 1ku SO (NS) | 20 2000 | LARGE T&R  
SN74HC563NSRG4 ACTIVE 0 to 70 2.90 | 1ku SO (NS) | 20 2000 | LARGE T&R  
SN74HC563 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74HC563DW Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563DW SN74HC563DW
SN74HC563DWE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563DWE4 SN74HC563DWE4
SN74HC563DWG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563DWG4 SN74HC563DWG4
SN74HC563DWR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563DWR SN74HC563DWR
SN74HC563DWRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563DWRE4 SN74HC563DWRE4
SN74HC563DWRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563DWRG4 SN74HC563DWRG4
SN74HC563N Pb-Free (RoHS)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563N SN74HC563N
SN74HC563NE4 Pb-Free (RoHS)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563NE4 SN74HC563NE4
SN74HC563NSR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563NSR SN74HC563NSR
SN74HC563NSRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563NSRE4 SN74HC563NSRE4
SN74HC563NSRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74HC563NSRG4 SN74HC563NSRG4
SN74HC563 应用技术支持与电子电路设计开发资源下载
  1. SN74HC563 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)