SN74LS674 串行输出移位寄存器

The 'LS673 is a 16-bit shift register and a 16-bit storage register in a single 24-pin package. A three-state input/output (SER/Q15) port to the shift register allows serial entry and/or reading of data. The storage register is connected in a parallel data loop with the shift register and may be asynchronously cleared by taking the store-clear input low. The storage register may be parallel loaded with shift-register data to provide shift-register status via the parallel outputs. The shift register can be parallel loaded with the storage-register data upon commmand.

A high logic level at the chip-level (CS\) input disables both the shift-register clock and the storage register clock and places SER/Q15 in the high-impedance state

SN74LS674
Technology Family ALS  
Rating Catalog  
SN74LS674 特性
SN74LS674 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LS674DW ACTIVE 0 to 70 49.90 | 1ku SOIC(DW) | 24 25 | TUBE  
SN74LS674DWE4 ACTIVE 0 to 70 49.90 | 1ku SOIC(DW) | 24 25 | TUBE  
SN74LS674DWG4 ACTIVE 0 to 70 49.90 | 1ku SOIC(DW) | 24 25 | TUBE  
SN74LS674N ACTIVE 0 to 70 54.90 | 1ku PDIP (N) | 24 15 | TUBE  
SN74LS674NE4 ACTIVE 0 to 70 54.90 | 1ku PDIP (N) | 24 15 | TUBE  
SN74LS674 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LS674DW Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LS674DW SN74LS674DW
SN74LS674DWE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LS674DWE4 SN74LS674DWE4
SN74LS674DWG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LS674DWG4 SN74LS674DWG4
SN74LS674N Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74LS674N SN74LS674N
SN74LS674NE4 Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74LS674NE4 SN74LS674NE4
SN74LS674 应用技术支持与电子电路设计开发资源下载
  1. SN74LS674 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)