SN74LVTH18504A 具有 20 位通用总线收发器的 3.3V ABT 扫描测试设备

The 'LVTH18504A and 'LVTH182504A scan test devices with 20-bit universal bus transceivers are members of the Texas Instruments (TI) SCOPE testability integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

Additionally, these devices are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

In the normal mode, these devices are 20-bit universal bus transceivers that combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes

SN74LVTH18504A
Voltage Nodes(V) 3.3, 2.7  
Vcc range(V) 2.7 to 3.6  
Input Level TTL/CMOS  
Logic True  
No. of Outputs 20  
Output Drive(mA) -32/64  
tpd max(ns) 5.1  
Output Level LVTTL  
Static Current 14.5  
Rating Catalog  
Technology Family LVT
SN74LVTH18504A 特性
SN74LVTH18504A 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
74LVTH18504APMRG4 ACTIVE -40 to 85 7.26 | 1ku LQFP (PM) | 64 160 | JEDEC TRAY (10+1)  
SN74LVTH18504APM ACTIVE -40 to 85 7.26 | 1ku LQFP (PM) | 64 160 | JEDEC TRAY (10+1)  
SN74LVTH18504A 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
74LVTH18504APMRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-3-260C-168 HR 74LVTH18504APMRG4 74LVTH18504APMRG4
SN74LVTH18504APM Green (RoHS & no Sb/Br)  CU NIPDAU  Level-3-260C-168 HR SN74LVTH18504APM SN74LVTH18504APM
SN74LVTH18504A 应用技术支持与电子电路设计开发资源下载
  1. SN74LVTH18504A 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器特殊逻辑产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)