SN74LVTH374-EP 具有三态输出的增强型产品 3.3V Abt 八路边沿 D 类触发器

This octal flip-flop is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

The eight flip-flops of the SN74LVTH374 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components

SN74LVTH374-EP
Voltage Nodes(V) 3.3, 2.7  
Vcc range(V) 2.7 to 3.6  
Input Level TTL/CMOS  
Output Level LVTTL  
Output Drive(mA) -32/+64  
No. of Bits 8  
Static Current 5  
th(ns) 0.8  
tpd max(ns) 4.5  
tsu(ns) 1.5  
Logic True  
Technology Family LVT  
Rating HiRel Enhanced Product
SN74LVTH374-EP 特性
SN74LVTH374-EP 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LVTH374IPWREP ACTIVE -40 to 85 0.56 | 1ku TSSOP (PW) | 20 2000 | LARGE T&R  
V62/04676-01XE ACTIVE -40 to 85 0.56 | 1ku TSSOP (PW) | 20 2000 | LARGE T&R  
SN74LVTH374-EP 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LVTH374IPWREP Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LVTH374IPWREP SN74LVTH374IPWREP
V62/04676-01XE Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM V62/04676-01XE V62/04676-01XE
SN74LVTH374-EP 应用技术支持与电子电路设计开发资源下载
  1. SN74LVTH374-EP 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器触发器/锁存器/寄存器产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)