MC100EPT622:Translator, 10-bit LVTTL / LVCMOS to LVPECL

The MC100EPT622 is a 10-Bit LVTTL/LVCMOS to LVPECL translator. Because LVPECL (Positive ECL) levels are used, only +3.3 V and ground are required. The device has an OR-ed enable input which can accept either LVPECL (ENPECL) or TTL/LVCMOS inputs (ENTTL). If the inputs are left open, they will default to the enable state. The device design has been optimized for low channel-to-channel skew.

技术特性
  • 450 ps Typical Propogation Delay
  • Maximum Frequency > 1.5 GHz Typical
  • PECL Mode
  • Operating Range: VCC = 3.0 V to 3.8 V with VEE = 0 V
  • PNP LVTTL Inputs for Minimal Loading
  • Q Outputs Will Default HIGH with Inputs Open
  • The 100 Series Contains Temperature Compensation
封装图 MARKING DIAGRAM

MC100EPT622 封装图

订购信息 Ordering Information
产品 状况 Compliance 具体说明 封装 MSL* 容器 预算价格 (1千个数量的单价)
类型 外形 类型 数量
MC100EPT622FAG Active
Pb-free
Halide free
Translator, 10-bit LVTTL / LVCMOS to LVPECL LQFP-32 873A-02 2 Tray JEDEC 250  
MC100EPT622FAR2G Active
Pb-free
Halide free
Translator, 10-bit LVTTL / LVCMOS to LVPECL LQFP-32 873A-02 2 Tape and Reel 2000  
MC100EPT622MNG Active
Pb-free
Halide free
Translator, 10-bit LVTTL / LVCMOS to LVPECL QFN-32 488AM 1 Tube 74  
MC100EPT622MNR4G Active
Pb-free
Halide free
Translator, 10-bit LVTTL / LVCMOS to LVPECL QFN-32 488AM 1 Tape and Reel 1000 $14.6663
数据资料DataSheet下载
概述 文档编号/大小 版本
Translator, 10-bit LVTTL / LVCMOS to LVPECL MC100EPT622-D(417.0kB) 1