特性

• Output Drive Capability: 15 LSTTL Loads
• TTL/NMOS-Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 10 mA
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 234 FETs or 58.5 Equivalent Gates 
  - Improved Propagation Delays 
  - 50% Lower Quiescent Power
• These devices are available in Pb-free package(s). Specifications herein apply to both standard and Pb-free devices. Please see our website at www.onsemi.com for specific Pb-free orderable part numbers, or contact your local ON Semiconductor sales office or representative.

封装图 MARKING DIAGRAM