LAN9311

The LAN9311/LAN9311i is a full featured, 2 port 10/100 managed Ethernet switch designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9311/LAN9311i combines all the functions of a 10/100 switch system, including the switch fabric, packet buffers, buffer manager, media access controllers (MACs), PHY transceivers, and host bus interface. The LAN9311/LAN9311i complies with the IEEE 802.3 (full/half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol specification and 802.1D/802.1Q network management protocol specifications, enabling compatibility with industry standard Ethernet and Fast Ethernet applications.

At the core of the LAN9311/LAN9311i is the high performance, high efficiency 3 port Ethernet switch fabric. The switch fabric contains a 3 port VLAN layer 2 switch engine that supports untagged, VLAN tagged, and priority tagged frames. The switch fabric provides an extensive feature set which includes spanning tree protocol support, multicast packet filtering and Quality of Service (QoS) packet prioritization by VLAN tag, destination address, port default value or DIFFSERV/TOS, allowing for a range of prioritization implementations. 32K of buffer RAM allows for the storage of multiple packets while forwarding operations are completed, and a 1K entry forwarding table provides ample room for MAC address forwarding tables. Each port is allocated a cluster of 4 dynamic QoS queues which allow each queue size to grow and shrink with traffic, effectively utilizing all available memory. This memory is managed dynamically via the buffer manager block within the switch fabric. All aspects of the switch fabric are managed via the switch fabric configuration and status registers, which are indirectly accessible via the memory mapped system control and status registers.

产品特性
  • High performance and full featured 2 port switch with VLAN, QoS packet prioritization, Rate Limiting, IGMP monitoring and management functions
  • Easily interfaces to most 16-bit embedded CPU's
  • Unique Virtual PHY feature simplifies software development by mimicking the multiple switch ports as a single port MAC/PHY
  • Integrated IEEE 1588 Hardware Time Stamp Unit
  • Cable, satellite, and IP set-top boxes
  • Digital televisions
  • Digital video recorders
  • VoIP/Video phone systems
  • Home gateways
  • Test/Measurement equipment
  • Industrial automation systems
  • Ethernet Switch Fabric 32K buffer RAM 1K entry forwarding table Port based IEEE 802.1Q VLAN support (16 groups) Programmable IEEE 802.1Q tag insertion/removal IEEE 802.1d spanning tree protocol support QoS/CoS Packet prioritization 4 dynamic QoS queues per port Input priority determined by VLAN tag, DA lookup, TOS, DIFFSERV or port default value Programmable class of service map based on input priority Remapping of 802.1Q priority field on per port basis Programmable rate limiting at the ingress/egress ports with random early discard, per port/priority IGMP v1/v2/v3 monitoring for Multicast packet filtering Programmable filter by MAC address
  • 32K buffer RAM
  • 1K entry forwarding table
  • Port based IEEE 802.1Q VLAN support (16 groups) Programmable IEEE 802.1Q tag insertion/removal
  • Programmable IEEE 802.1Q tag insertion/removal
  • IEEE 802.1d spanning tree protocol support
  • QoS/CoS Packet prioritization 4 dynamic QoS queues per port Input priority determined by VLAN tag, DA lookup, TOS, DIFFSERV or port default value Programmable class of service map based on input priority Remapping of 802.1Q priority field on per port basis Programmable rate limiting at the ingress/egress ports with random early discard, per port/priority
  • 4 dynamic QoS queues per port
  • Input priority determined by VLAN tag, DA lookup, TOS, DIFFSERV or port default value
  • Programmable class of service map based on input priority
  • Remapping of 802.1Q priority field on per port basis
  • Programmable rate limiting at the ingress/egress ports with random early discard, per port/priority
  • IGMP v1/v2/v3 monitoring for Multicast packet filtering
  • Programmable filter by MAC address
  • Switch Management Port mirroring/monitoring/sniffing: ingress and/or egress traffic on any ports or port pairs Fully compliant statistics (MIB) gathering counters Control registers configurable on-the-fly
  • Port mirroring/monitoring/sniffing: ingress and/or egress traffic on any ports or port pairs
  • Fully compliant statistics (MIB) gathering counters
  • Control registers configurable on-the-fly
  • Ports 2 internal 10/100 PHYs with HP Auto-MDIX support Fully compliant with IEEE 802.3 standards 10BASE-T and 100BASE-TX support Full and half duplex support Full duplex flow control Backpressure (forced collision) half duplex flow control Automatic flow control based on programmable levels Automatic 32-bit CRC generation and checking Automatic payload padding 2K Jumbo packet support Programmable interframe gap, flow control pause value Full transmit/receive statistics Auto-negotiation Automatic MDI/MDI-X Loop-back mode
  • 2 internal 10/100 PHYs with HP Auto-MDIX support
  • Fully compliant with IEEE 802.3 standards
  • 10BASE-T and 100BASE-TX support
  • Full and half duplex support
  • Full duplex flow control
  • Backpressure (forced collision) half duplex flow control
  • Automatic flow control based on programmable levels
  • Automatic 32-bit CRC generation and checking
  • Automatic payload padding
  • 2K Jumbo packet support
  • Programmable interframe gap, flow control pause value
  • Full transmit/receive statistics
  • Auto-negotiation
  • Automatic MDI/MDI-X
  • Loop-back mode
  • High-performance host bus interface Provides in-band network communication path Access to management registers Simple, SRAM-like interface 16-bit data bus Big, little, and mixed endian support Large TX and RX FIFO's for high latency applications Programmable water marks and threshold levels Host interrupt support
  • Provides in-band network communication path
  • Access to management registers
  • Simple, SRAM-like interface
  • 16-bit data bus
  • Big, little, and mixed endian support
  • Large TX and RX FIFO's for high latency applications
  • Programmable water marks and threshold levels
  • Host interrupt support
  • IEEE 1588 Hardware Time Stamp Unit Global 64-bit tunable clock Master or slave mode per port Time stamp on TX or RX of Sync and Delay_req packets per port, Timestamp on GPIO 64-bit timer comparator event generation (GPIO or IRQ)
  • Global 64-bit tunable clock
  • Master or slave mode per port
  • Time stamp on TX or RX of Sync and Delay_req packets per port, Timestamp on GPIO
  • 64-bit timer comparator event generation (GPIO or IRQ)
  • Comprehensive Power Management Features Wake on LAN Wake on link status change (energy detect) Magic packet wakeup Wakeup indicator event signal
  • Wake on LAN
  • Wake on link status change (energy detect)
  • Magic packet wakeup
  • Wakeup indicator event signal
  • Other Features General Purpose Timer Serial EEPROM interface (I2C master or Microwire™ master) for non-managed configuration Programmable GPIOs/LEDs
  • General Purpose Timer
  • Serial EEPROM interface (I2C master or Microwire™ master) for non-managed configuration
  • Programmable GPIOs/LEDs
  • Single 3.3V power supply
  • Available in Commercial & Industrial Temp. Ranges
技术参数
Parameter Name Value Value
Description 10/100 2-port Managed Ethernet Switches with Local Bus interface 10/100 2-port Managed Ethernet Switches with Local Bus interface
Ethernet Bandwidth 10Base-T/ 100Base-TX 10Base-T/ 100Base-TX
MAC Yes Yes
PHY Yes Yes
TX/RX RAM Buffer(Bytes) 40K 40K
Interrupt Pin Yes Yes
LEDs 12 12
Op. Voltage (V) 3.3 3.3
# Ethernet Ports 2 2
Interface 16 bit Host Bus 16 bit Host Bus
I/O Pins 8 8
Temp. Range Max. (°C) 70 70
# of Ports 2 2
Host Interface 16-Bit 16-Bit
# of Ether Ports 3 3
Supply Voltage (V) 3.3 3.3
Vdd I/O (V) 3.3 3.3
文档资料
LAN9311/LAN9311i Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPData Sheets02/14/20133039KB
AN17.18 - SMSC Design Guide for Power over Ethernet ApplicationsAppNote09/20/2009445KB
AN2157 - Transient Protection in Power Over Ethernet ApplicationsAppNote05/24/2016229KB
AN8.13 - Suggested MagneticsAppNote06/28/2011240KB
LAN91xx/LAN92xx/LAN9311/LAN9312 eBoot Driver for XScale ProcessorSoftware Library06/01/2007
LAN91xx/LAN92xx/LAN9311/LAN9312 Linux Driver on SH3 ProcessorSoftware Library08/22/2008
LAN91xx/LAN92xx/LAN9311/LAN9312 Linux driver on XScale processorSoftware Library08/22/2008
LAN91xx/LAN92xx/LAN9311/LAN9312 Windows CE 5.0 & 6.0 DriverSoftware Library01/29/2014
LAN93xx EEPROM Configuration Tool (ECT)Software Library08/12/2009
LAN93xx Linux source code and binariesSoftware Library08/20/2009
LAN9311 (X)VTQFP Rev B Schematic ChecklistDesign Checklist07/28/2008137KB
LAN9311 128-pin (X)VTQFP Package Component Placement ChecklistDesign Checklist01/04/200863KB
LAN9311 128-pin (X)VTQFP Package Routing ChecklistDesign Checklist01/04/200852KB
LAN9311I 128-pin XVTQFP Package Component Placement ChecklistDesign Checklist01/04/200883KB
LAN9311I 128-pin XVTQFP Package Routing ChecklistDesign Checklist01/04/200851KB
LAN9311I XVTQFP Rev B Schematic ChecklistDesign Checklist07/28/2008147KB
LAN9311/LAN9311i Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPProduct Briefs02/14/2013290KB
LAN9311/LAN9311i Reference Design Bill of MaterialsSchematics01/03/200819KB
LAN9311/LAN9311i Reference Design SchematicSchematics01/03/200867KB
订购型号
Part NumberLeadsPackage TypeTemp RangePacking1+26+100+1000+5000+
LAN9311I-NZW128TQFP-40C to +85CTRAY12.7210.609.649.319.20
LAN9311-NU128TQFP0C to +70CTRAY10.178.487.717.447.36
LAN9311-NZW128TQFP0C to +70CTRAY10.178.487.717.447.36
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器件无铅环保信息
PartNumberDeviceWeightShippingWeightLeadCountPackageTypePackageWidthSolderCompositionJEDECIndicatorRoHSChinaEFUP
LAN9311-NZW0.4972004.000000128TQFP14x14x1mmMatte Tine3
LAN9311I-NZW0.4972004.000000128TQFP14x14x1mmMatte Tine3
LAN9311I-NZW-TR0.4972001.020000128TQFP14x14x1mmMatte Tine3
LAN9311-NZW-TR0.4972001.020000128TQFP14x14x1mmMatte Tine3
LAN9311-NU0.5575002.888889128TQFP14x14x1mmMatte Tine3
LAN9311/LAN9311i Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CP LAN9311
AN17.18 LAN9311
AN2157 LAN9353
AN8.13 LAN9355
LAN9311 (X)VTQFP Rev B Schematic Checklist LAN9311
LAN9311 128-pin (X)VTQFP Package Component Placement Checklist LAN9311
LAN9311 128-pin (X)VTQFP Package Routing Checklist LAN9311
LAN9311I 128-pin XVTQFP Package Component Placement Checklist LAN9311
LAN9311I 128-pin XVTQFP Package Routing Checklist LAN9311
LAN9311I XVTQFP Rev B Schematic Checklist LAN9311
LAN9311/LAN9311i Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CP LAN9311
LAN9311/LAN9311i Reference Design Bill of Materials LAN9311
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