74LVC2G17GV: Dual non-inverting Schmitt trigger with 5 V tolerant input

The 74LVC2G17 provides two non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

74LVC2G17GV: Product Block Diagram
SOT457
Data Sheets (1)
Name/DescriptionModified Date
Dual non-inverting Schmitt trigger with 5 V tolerant input (REV 8.0) PDF (200.0 kB) 74LVC2G17 [English]02 May 2013
Application Notes (4)
Name/DescriptionModified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]30 Oct 2002
Package Information (1)
Name/DescriptionModified Date
plastic surface-mounted package (TSOP6); 6 leads (REV 1.0) PDF (248.0 kB) SOT457 [English]08 Feb 2016
Packing (1)
Name/DescriptionModified Date
Tape reel SMD; reversed product orientation 12NC ending 125 (REV 1.0) PDF (187.0 kB) SOT457_125 [English]30 Nov 2012
Supporting Information (3)
Name/DescriptionModified Date
Reflow Soldering Profile (REV 1.0) PDF (34.0 kB) REFLOW_SOLDERING_PROFILE [English]30 Sep 2013
Wave Soldering Profile (REV 1.0) PDF (20.0 kB) WAVE_SOLDERING_PROFILE [English]30 Sep 2013
MAR_SOT457 Topmark (REV 1.0) PDF (113.0 kB) MAR_SOT457 [English]03 Jun 2013
IBIS Model
Ordering Information
ProductStatusFamilyVCC (V)FunctionLogic switching levelsDescriptionPackage versionOutput drive capability (mA)tpd (ns)fmax (MHz)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC2G17GVActiveLVC1.65 - 5.5Schmitt-triggersCMOS/LVTTLdual buffer Schmitt-triggerSOT457+/- 323.61752low-40~12523239.4145TSOP66
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateEFRIFR(FIT)MTBF(hour)MSLMSL LF
74LVC2G17GVSOT457Reflow_Soldering_Profile Wave_Soldering_Profile
Reflow_Soldering_Profile Wave_Soldering_Profile
Reel 7" Q3/T4, ReverseActive74LVC2G17GV,125 (9352 733 19125)Standard Marking74LVC2G17GVAlways Pb-free123.83.872.58E811
Dual non-inverting Schmitt trigger with 5 V tolerant input 74LVC2G17GW
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
PicoGate Logic footprints NX3L4684
MAR_SOT457 Topmark 74LVC2G17_Q100
74LVC2G17 IBIS model 74LVC2G17GW
plastic surface-mounted package (TSOP6); 6 leads 74LVC2G17_Q100
Reflow_Soldering_Profile Wave_Soldering_Profile LPC1112FD20
Reflow_Soldering_Profile Wave_Soldering_Profile LPC1112FD20
Tape reel SMD; reversed product orientation 12NC ending 125 74LVC2G17_Q100
74LVC2G17
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