LPC11E36FHN33: Scalable Entry Level 32-bit Microcontroller (MCU) based on ARM® Cortex®-M0+/M0 Cores

NXP’s exclusive software-driven I/O Handler (IOH) on the LPC11E37HFBD64 gives designers the ultimate design flexibility to adapt the MCU configuration and functionality to fit application needs at any time during the design cycle. The I/O Handler is a software-driven block supported by software libraries that can be used to add performance, connectivity and flexibility to system designs. The I/O Handler can emulate serial interfaces such as UART, I²C, or I²S with no or very low additional CPU load and can off-load the CPU by performing processing-intensive functions like DMA transfers in hardware.

Software libraries available for the I/O Handler include I²S, I²C, UART, CRC, threshold ADC conversion, and DMA functionality. The libraries can be downloaded at: www.lpcware.com/ioh

So whether it’s deciding on communication interfaces, accommodating late design changes, or requiring more performance or power efficiency from the application, the I/O Handler gives designers the ability to save time and cost while adding functionality to meet design deadlines.

sot865-3_3d
Data Sheets (1)
Name/DescriptionModified Date
32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash; up to 12 kB SRAM and 4 kB EEPROM; USART (REV 2.3) PDF (1.6 MB) LPC11E3X11 Sep 2014
Errata (1)
Name/DescriptionModified Date
Errata sheet LPC11E3x (REV 1.2) PDF (32.0 kB) ES_LPC11E3X18 Sep 2014
Application Notes (4)
Name/DescriptionModified Date
AES encryption and decryption software on LPC microcontrollers (REV 1.1) ZIP (174.0 kB) AN1124117 Mar 2014
I2C secondary boot loader (REV 1.0) ZIP (661.0 kB) AN1125809 Aug 2013
SPI secondary boot loader (REV 1.0) ZIP (638.0 kB) AN1125722 Jul 2013
How to implement the PMBus software stack (REV 1.0) ZIP (1.1 MB) AN1131822 Jul 2013
Users Guides (1)
Name/DescriptionModified Date
LPC11Exx User manual (REV 3.4) PDF (2.8 MB) UM1051811 Sep 2014
Brochures (1)
Name/DescriptionModified Date
NXP® ARM® Cortex™-M0/M0+ MCUs LPC11E00 (REV 1.0) PDF (871.0 kB) 7501755001 Mar 2014
Package Information (1)
Name/DescriptionModified Date
plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 7 x 7 x 0.85 mm (REV 1.0) PDF (204.0 kB) SOT865-308 Feb 2016
Supporting Information (1)
Name/DescriptionModified Date
ADC design guidelines (REV 1.0) PDF (145.0 kB) TN0000909 May 2014
Ordering Information
ProductStatusCoreClock speed [max] (MHz)DMIPSFlash (kB)RAM (kB)EEPROM (kB)GPIOEthernetUSBUSB (speed)USB (type)LCDCANUARTI²CSPII²SADC sample rateADC channelsADC (bits)ComparatorsTimersDAC (bits)Timer (bits)SCTimer / PWMRTCPWMPackage nameTemperature rangeTemperature sensorIOHSupply voltage [min] (V)Supply voltage [max] (V)Product categoryDemoboard
LPC11E36FHN33/501ActiveCortex-M050961242811810416; 32111HVQFN32-40 °C to +85 °C1.83.6OM13062
Package Information
Product IDPackage DescriptionOutline VersionReflow/Wave SolderingPackingProduct StatusPart NumberOrdering code(12NC)MarkingChemical ContentRoHS / Pb Free / RHFLeadFree Conversion DateMSLMSL LF
LPC11E36FHN33/501SOT865-3Tray, Bakeable, Single in DrypackActiveLPC11E36FHN33/501E (9352 996 76551)Standard MarkingLPC11E36FHN33/501Always Pb-free33
32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash; up to 12 kB SRAM and 4 kB EEPROM; USART LPC11E37FBD64
Errata sheet LPC11E3x LPC11E37FBD64
AES encryption and decryption software on LPC microcontrollers LPC43S50FET256
I2C secondary boot loader LPC1788FET208
SPI secondary boot loader LPC1788FET208
How to implement the PMBus software stack LPC43S50FET256
LPC11Exx User manual LPC11E68JBD64
NXP® ARM® Cortex™-M0/M0+ MCUs LPC11E00 LPC11E68JBD64
ADC design guidelines LPC4333JET256
SOT865-3 LPC1347FHN33
NXQ1TXA1