74ACT11286 具有总线驱动器奇偶校验 I/O 端口的 9 位奇偶校验发生器/校验器

The 74ACT11286 universal 9-bit parity generator/checker features a local output for parity checking and a bus-driving parity I/O port for parity generation/checking. The word-length capability is easily expanded by cascading.

The control input is implemented specifically to accommodate cascading. When the is low, the parity tree is disabled and the PARITY ERROR output remains at a high logic level, regardless of the input levels. When is high, the parity tree is enabled. PARITY ERROR indicates a parity error when either an even number of inputs (A through I) are high and PARITY I/O is forced to a low logic level, or when an odd number of inputs are high and PARITY I/O is forced to a high logic level

74ACT11286
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74ACT11286 特性
74ACT11286 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
74ACT11286D ACTIVE -40 to 85 3.25 | 1ku SOIC (D) | 14 50 | TUBE  
74ACT11286DE4 ACTIVE -40 to 85 3.25 | 1ku SOIC (D) | 14 50 | TUBE  
74ACT11286DG4 ACTIVE -40 to 85 3.25 | 1ku SOIC (D) | 14 50 | TUBE  
74ACT11286DR ACTIVE -40 to 85 2.70 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
74ACT11286DRE4 ACTIVE -40 to 85 2.70 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
74ACT11286DRG4 ACTIVE -40 to 85 2.70 | 1ku SOIC (D) | 14 2500 | LARGE T&R  
74ACT11286 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
74ACT11286D Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT11286D 74ACT11286D
74ACT11286DE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT11286DE4 74ACT11286DE4
74ACT11286DG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT11286DG4 74ACT11286DG4
74ACT11286DR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT11286DR 74ACT11286DR
74ACT11286DRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT11286DRE4 74ACT11286DRE4
74ACT11286DRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM 74ACT11286DRG4 74ACT11286DRG4
74ACT11286 应用技术支持与电子电路设计开发资源下载
  1. 74ACT11286 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)