CD74HC4017-EP 具有 10 个解码输出的增强型产品十进制计数器/除法器
The CD74HC4017 is a high-speed silicon-gate CMOS 5-stage Johnson counter with ten decoded outputs. Each of the decoded outputs normally is low and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry (TC) output transitions low to high after output 9 goes from high to low and can be used in conjunction with the clock enable (CE)\ input to cascade several stages. CE\ disables counting when in the high state. A master reset (MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.
The device can drive up to ten low-power Schottky equivalent loads
CD74HC4017-EP 特性
- Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
- Extended Temperature Performance of –40°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree
- Fully Static Operation
- Buffered Inputs
- Common Reset
- Positive Edge Clocking
- Typical fmax = 60 MHz at VCC = 5 V, CL = 15 pF, TA = 25°C
- Fanout (Over Temperature Range)
- Standard Outputs . . . 10 LSTTL Loads
- Bus Driver Outputs . . . 15 LSTTL Loads
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- VCC Voltage = 2 V to 6 V
- High Noise Immunity NIL or NIH = 30% of VCC, VCC = 5 V
CD74HC4017-EP 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| CD74HC4017QM96EP |
ACTIVE |
-40 to 125 |
0.53 | 1ku |
SOIC (D) | 16 |
2500 | LARGE T&R |
|
| CD74HC4017QPWREP |
ACTIVE |
-40 to 125 |
0.53 | 1ku |
TSSOP (PW) | 16 |
2000 | LARGE T&R |
|
| V62/04703-01XE |
ACTIVE |
-40 to 125 |
0.53 | 1ku |
SOIC (D) | 16 |
2500 | LARGE T&R |
|
| V62/04703-01YE |
ACTIVE |
-40 to 125 |
0.53 | 1ku |
TSSOP (PW) | 16 |
2000 | LARGE T&R |
|
CD74HC4017-EP 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| CD74HC4017QM96EP |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC4017QM96EP |
CD74HC4017QM96EP |
| CD74HC4017QPWREP |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
CD74HC4017QPWREP |
CD74HC4017QPWREP |
| V62/04703-01XE |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
V62/04703-01XE |
V62/04703-01XE |
| V62/04703-01YE |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-1-260C-UNLIM |
V62/04703-01YE |
V62/04703-01YE |
CD74HC4017-EP 应用技术支持与电子电路设计开发资源下载
- CD74HC4017-EP 数据资料 dataSheet 下载.PDF
- TI 德州仪器MSI 功能产品选型与价格 . xls
- Logic Guide 2009 (PDF 4263 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)
