SN74AVCH24T245 具有可配置电压转换和 3 态输出的 24 位双电源总线收发器

This 24-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVCH24T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.

The SN74AVCH24T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input

SN74AVCH24T245
Vcc range(V) 1.2 to 3.6  
Logic True  
No. of Bits 24  
No. of Outputs 24  
Bus Drive(ma) -12/12  
Static Current 0.075  
tpd max(ns) 2.7  
Technology Family AVC  
Pin/Package 83BGA MICROSTAR JUNIOR  
Operating Temperature Range(°C) -40 to 85  
Approx. Price (US$) 1.75 | 1ku  
Rating Catalog
SN74AVCH24T245 特性
SN74AVCH24T245 芯片订购指南
器件 状态 温度 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74AVCH24T245GRGR ACTIVE -40 to 85 2.60 | 1ku BGA MICROSTAR JUNIOR (GRG) | 83 1000 | LARGE T&R  
SN74AVCH24T245ZRGR ACTIVE -40 to 85 1.75 | 1ku BGA MICROSTAR JUNIOR (ZRG) | 83 1000 | LARGE T&R  
SN74AVCH24T245 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74AVCH24T245GRGR TBD  SNPB  Level-1-240C-UNLIM SN74AVCH24T245GRGR SN74AVCH24T245GRGR
SN74AVCH24T245ZRGR Green (RoHS & no Sb/Br)  SNAGCU  Level-1-260C-UNLIM SN74AVCH24T245ZRGR SN74AVCH24T245ZRGR
SN74AVCH24T245 应用技术支持与电子电路设计开发资源下载
  1. SN74AVCH24T245 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器电压电平转换产品选型与价格 . xls
  3. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  4. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  5. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  6. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  7. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  8. Designing With Logic (PDF 186 KB)
  9. Live Insertion (PDF 150 KB)
  10. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  11. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  12. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  13. LOGIC Pocket Data Book (PDF 6001 KB)
  14. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  15. Logic Cross-Reference (PDF 2938 KB)