SN74LV138A 3 线路到 8 线路解码器/多路解复用器

The 'LV138A devices are 3-line to 8-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation.

These devices are designed for high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.

The conditions at the binary-select inputs (A, B, C) and the three enable inputs (G1, G2A, G2B) select one of eight output lines. The two active-low (G2A, G2B) and one active-high (G1) enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down

SN74LV138A
Rating Catalog
Technology Family LV-A  
SN74LV138A 特性
SN74LV138A 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN74LV138AD ACTIVE -40 to 85 0.21 | 1ku SOIC (D) | 16 40 | TUBE  
SN74LV138ADE4 ACTIVE -40 to 85 0.21 | 1ku SOIC (D) | 16 40 | TUBE  
SN74LV138ADG4 ACTIVE -40 to 85 0.21 | 1ku SOIC (D) | 16 40 | TUBE  
SN74LV138ADR ACTIVE -40 to 85 0.17 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN74LV138ADRE4 ACTIVE -40 to 85 0.17 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN74LV138ADRG4 ACTIVE -40 to 85 0.17 | 1ku SOIC (D) | 16 2500 | LARGE T&R  
SN74LV138AN ACTIVE -40 to 85 0.18 | 1ku PDIP (N) | 16 25 | TUBE  
SN74LV138ANE4 ACTIVE -40 to 85 0.18 | 1ku PDIP (N) | 16 25 | TUBE  
SN74LV138A 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN74LV138AD Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LV138AD SN74LV138AD
SN74LV138ADE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LV138ADE4 SN74LV138ADE4
SN74LV138ADG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LV138ADG4 SN74LV138ADG4
SN74LV138ADR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LV138ADR SN74LV138ADR
SN74LV138ADRE4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LV138ADRE4 SN74LV138ADRE4
SN74LV138ADRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-1-260C-UNLIM SN74LV138ADRG4 SN74LV138ADRG4
SN74LV138AN Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74LV138AN SN74LV138AN
SN74LV138ANE4 Pb-Free (RoHS)  CU NIPDAU  N/A for Pkg Type SN74LV138ANE4 SN74LV138ANE4
SN74LV138A 应用技术支持与电子电路设计开发资源下载
  1. SN74LV138A 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器MSI 功能产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)