SN65LVDT386 16 通道 LVDS 接收器

This family of four-, eight-, or sixteen-, differential line receivers (with optional integrated termination) implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3-V supply rail. Any of the eight or sixteen differential receivers provides a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes. Additionally, the high-speed switching of LVDS signals almost always requires the use of a line impedance matching resistor at the receiving end of the cable or transmission media

SN65LVDS386 SN65LVDS387 SN65LVDS388A SN65LVDS389 SN65LVDT386 SN65LVDT388A SN75LVDS388A SN75LVDT388A
Input Signal LVDS   LVTTL   LVDS   LVTTL   LVDS   LVDS   LVDS   LVDS  
Output Signal LVTTL   LVDS   LVTTL   LVDS   LVTTL   LVTTL   LVTTL   LVTTL  
No. of Rx 16     8     16   8   8   8  
No. of Tx   16     8          
Signaling Rate(Mbps) 630   630   630   630   630   630   630   630  
Supply Voltage(s)(V) 3.3   3.3   3.3   3.3   3.3   3.3   3.3   3.3  
ICC(Max)(mA) 70   95   40   70   70   40   40   40  
Rx tpd(Typ)(ns) 2.5     2.6     2.6   2.6   2.6   2.6  
Tx tpd(Typ)(ns)   1.7     1.7          
Part-to-Part Skew(Max)(ps) 1000   1500   1000   1500   1000   1000   1000   1000  
Pin/Package 64TSSOP   64TSSOP   38TSSOP   38TSSOP   64TSSOP   38TSSOP   38TSSOP   38TSSOP  
Operating Temperature Range(°C) -40 to 85   -40 to 85   -40 to 85   -40 to 85   -40 to 85   -40 to 85   0 to 70   0 to 70  
ESD HBM(kV) 15   15   15   15   15   15   4   4  
Approx. Price (US$) 4.60 | 1ku   4.60 | 1ku   2.00 | 1ku   2.00 | 1ku   4.85 | 1ku   2.10 | 1ku   2.40 | 1ku   2.10 | 1ku
SN65LVDT386 特性
SN65LVDT386 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
SN65LVDT386DGG ACTIVE -40 to 85 5.40 | 1ku TSSOP (DGG) | 64 25 | TUBE  
SN65LVDT386DGGG4 ACTIVE -40 to 85 5.40 | 1ku TSSOP (DGG) | 64 25 | TUBE  
SN65LVDT386DGGR ACTIVE -40 to 85 4.60 | 1ku TSSOP (DGG) | 64 2000 | LARGE T&R  
SN65LVDT386DGGRG4 ACTIVE -40 to 85 4.60 | 1ku TSSOP (DGG) | 64 2000 | LARGE T&R  
SN65LVDT386 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
SN65LVDT386DGG Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDT386DGG SN65LVDT386DGG
SN65LVDT386DGGG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDT386DGGG4 SN65LVDT386DGGG4
SN65LVDT386DGGR Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDT386DGGR SN65LVDT386DGGR
SN65LVDT386DGGRG4 Green (RoHS & no Sb/Br)  CU NIPDAU  Level-2-260C-1 YEAR SN65LVDT386DGGRG4 SN65LVDT386DGGRG4
SN65LVDT386 应用技术支持与电子电路设计开发资源下载
  1. SN65LVDT386 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器LVDS PHYs选型与价格 . xls
  3. 所选封装材料的热学和电学性质 (PDF 645 KB)
  4. 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
  5. 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
  6. 接口选择指南 (Rev. D) (PDF 2994 KB)
  7. Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
  8. Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
  9. Isolated RS-485 Reference Design (PDF 80 KB)
  10. 无铅组件涂层的保存期评估 (PDF 1305 KB)
  11. Analog Signal Chain Guide (8.62 MB)
  12. Industrial Interface IC Solutions (101 KB)